This project is supported and funded by the UK’s innovation agency, Innovate UK, as part of its Transformative Technologies program. This program provides investment and support to the UK’s advanced technical industries, with an emphasis on the development in high tech sectors including semiconductors, artificial intelligence and engineering biology. This program is part of an innovation ecosystem that supports the UK’s commitment to fostering innovation and driving economic growth.
Blog Layout
OSIRIS DFM for Standard Cells
IN2FAB to add DFM capability to OSIRIS tools with support from Innovate UK
IN2FAB Technology is enhancing its schematic and layout migration products to deliver interactive DFM implementation for standard cell libraries and digital design. The new program will deliver an efficient design environment that allows engineers to evaluate enhanced rule sets against their circuits across libraries containing hundreds of individual elements. Single rule grouped rule changes can be run at the touch of a button, while checking configurations will be automatically generated.
The OSIRIS DFM tool will represent an important new product in IN2FAB's portfolio. The company's primary focus has been on tools and services for translating silicon IP from one manufacturing process to another. OSIRIS DFM delivers an efficient new interface to explore yield enhancement options and improve circuit performance .
Semiconductors must observe physical rules which define the elements in a circuit, and these can be extremely complex. Extra constraints called Design for Manufacturing (DFM) rules can be applied to improve performance and manufacturing yield, but these can affect chip size, complexity and cost.
Semiconductor manufacturing is rapidly increasing in complexity and silicon density, placing greater challenges to engineers and design software manufacturers. IN2FAB's new software will help designers keep pace with these changes and choose the best options for the next generation of silicon.
Automated modifications to standard cell libraries saves time and money
Rapid porting accelerates SoC development using existing cores or 3rd party IP.
Database translation tools enable rapid circuit integration
Migrating standard cells pays huge dividends
Should a migration project be performed internally or through a design service?
Migration from planar silicon to GF 22FDX SOI process