Introducing OSIRIS

IN2FAB’s unique technology for design process migration of analog mixed signal and customer semiconductor IP is called OSIRIS – Optimal Scaling IP Reuse Integration System. Built upon IN2FAB’s patented Complex Nodal Scaling technology OSIRIS powers the most effective migration solution in the industry as proven by the extensive track record of success across a very diverse range of applications.

Fully integrated with design tools from Cadence Design Systems, OSIRIS maintains the integrity of the original design by making small adjustments to the circuit to meet new rules while keeping the topology and integrity of the original design intact. OSIRIS works with parameterised cells and process design kits to translate designs while maintaining the integrity of the library data.

 

 

OSIRIS Technology & Methodology

Once IN2FAB's OSIRIS system has calculated the relationships between the old and new processes, the layout is mapped to the new layers and component types and then scaled to an optimum size, completely preserving the hierarchy and topology. This new layout is then adjusted through a series of powerful manipulation routines to remove DRC violations and, where required, adjust component values to meet performance requirements.

Working within Cadence Design Systems framework, the OSIRIS tools provide the user with flexibility to modify the design at any stage of the migration process and make structural changes to their layout while OSIRIS takes care of data processing and shape based violations. The benefit of this approach is that designs of any size can be handled and the original intent of the designer is carried forward into the ported design.