90nm Migration Case Studies

Analog Mixed Signal IP Modules

European IDM

Type of chip/IP

• 8 analog mixed signal IP modules including ADCs, DACs, PLLs, bandgaps

Business Goals

• Achieve early availability of qualified analog mixed signal modules used widely across the corporation in 90nm process node to support various SoC development programs
• Avoid the need to redesign existing IP or tie up valuable analog design resources
• Avoid estimated 12 month cycle time to redevelop the same IP for 90nm

Source Process

• Crolles/TSMC 0.13µm

Target Process

• Crolles/TSMC 90nm

Project Cycle time

• 12 calendar weeks for porting of layout and schematics to target process/PDK

Results

• Working first time silicon for all modules
• Used in SoC designs some of which are in production
• Same modules have subsequently been migrated to 65nm and 45nm process nodes

GSM Frequency Synthesizer Module

Europe based design group of a US IDM

Type of chip/IP

• GSM Frequency Synthesizer

Business Goals

• Enable existing and proven IP to be reused with early availability in 90nm process node
  to support a time sensitive GSM development program
• Accelerate early availability of GSM IP in 90nm and reduce risk of overall program
• Meet tight schedule for market release of end product through faster cycle time

Source Process

• Internal foundry 0.13µm

Target Process

• Crolles/TSMC 90nm

Size of die/IP pre migration

• 1467.3µm x 2385.45µm drawn

Size of die/IP post migration

• 440µm x 715µm (0.3x linear shrink)

Project Cycle time

• 4 calendar weeks for porting of layout and schematics to target process/PDK

Results

• Working first time silicon for entire module
• Used in GSM application designs in production